Muluken Hailesellasie
Muluken Hailesellasie
Tennessee Tech., Intel
Verified email at students.tntech.edu
Title
Cited by
Cited by
Year
FPGA-based convolutional neural network architecture with reduced parameter requirements
M Hailesellasie, SR Hasan, F Khalid, FA Wad, M Shafique
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
192018
Mulnet: A flexible cnn processor with higher resource utilization efficiency for constrained devices
MT Hailesellasie, SR Hasan
IEEE Access 7, 47509-47524, 2019
102019
A fast FPGA-based deep convolutional neural network using pseudo parallel memories
M Hailesellasie, SR Hasan
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
92017
Intrusion Detection in PLC-Based Industrial Control Systems Using Formal Verification Approach in Conjunction with Graphs
M Hailesellasie, SR Hasan
Journal of Hardware and Systems Security 2 (1), 1-14, 2018
32018
Vaws: Vulnerability analysis of neural networks using weight sensitivity
M Hailesellasie, J Nelson, F Khalid, SR Hasan
2019 IEEE 62nd International Midwest Symposium on Circuits and Systems …, 2019
22019
MulMapper: towards an automated FPGA-Based CNN processor generator based on a dynamic design space exploration
M Hailesellasie, SR Hasan, OA Mohamed
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019
22019
FPGA Implementation of Multipath FFT for Cognitive Radio
M Hailesellasie
Institute of Electron Devices and Circuits, University of Ulm, 2015
2015
Architecture with Reduced Parameter Requirements
M Hailesellasie, SR Hasan, F Khalid, F Awwad, M Shafique
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Articles 1–8