| Low-power SRAM memory cell YJ Chang, F Lai, CL Yang US Patent 7,345,909, 2008 | 118 | 2008 |
| Hybrid-type CAM design for both power and performance efficiency YJ Chang, YH Liao IEEE transactions on very large scale integration (VLSI) systems 16 (8), 965-974, 2008 | 104 | 2008 |
| Zero-aware asymmetric SRAM cell for reducing cache power in writing zero YJ Chang, F Lai, CL Yang IEEE transactions on very large scale integration (VLSI) systems 12 (8), 827-836, 2004 | 96 | 2004 |
| Fast color-spatial feature based image retrieval methods CH Lin, DC Huang, YK Chan, KH Chen, YJ Chang Expert Systems with Applications 38 (9), 11412-11420, 2011 | 69 | 2011 |
| Design and analysis of low-power cache using two-level filter scheme YJ Chang, SJ Ruan, F Lai IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11 (4), 568-580, 2003 | 59 | 2003 |
| Two new techniques integrated for energy-efficient TLB design YJ Chang, MF Lan IEEE transactions on very large scale integration (VLSI) systems 15 (1), 13-23, 2007 | 48 | 2007 |
| A low power radix-4 booth multiplier with pre-encoded mechanism YJ Chang, YC Cheng, SC Liao, CH Hsiao IEEE access 8, 114842-114853, 2020 | 40 | 2020 |
| A high-performance and energy-efficient TCAM design for IP-address lookup YJ Chang IEEE Transactions on Circuits and Systems II: Express Briefs 56 (6), 479-483, 2009 | 38 | 2009 |
| Low leakage TCAM for IP lookup using two-side self-gating YJ Chang, KL Tsai, HJ Tsai IEEE Transactions on Circuits and Systems I: Regular Papers 60 (6), 1478-1486, 2013 | 36 | 2013 |
| Imprecise 4‐2 compressor design used in image processing applications YJ Chang, YC Cheng, YF Lin, SC Liao, CH Lai, TC Wu IET Circuits, Devices & Systems 13 (6), 848-856, 2019 | 35 | 2019 |
| Dynamic zero-sensitivity scheme for low-power cache memories YJ Chang, F Lai IEEE Micro 25 (4), 20-32, 2005 | 35 | 2005 |
| Master–Slave Match Line design for low-power content-addressable memory YJ Chang, TC Wu IEEE transactions on very large scale integration (vlsi) systems 23 (9 …, 2014 | 26 | 2014 |
| An ultra low-power TLB design YJ Chang Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006 | 25 | 2006 |
| A full parallel priority encoder design used in comparator SW Huang, YJ Chang 2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 877-880, 2010 | 24 | 2010 |
| Lazy BTB: reduce BTB energy consumption using dynamic profiling YJ Chang Proceedings of the 2006 Asia and South Pacific Design Automation Conference …, 2006 | 23 | 2006 |
| Automatic charge balancing content addressable memory with self-control mechanism KL Tsai, YJ Chang, YC Cheng IEEE Transactions on Circuits and Systems I: Regular Papers 61 (10), 2834-2841, 2014 | 20 | 2014 |
| Using the dynamic power source technique to reduce TCAM leakage power YJ Chang IEEE Transactions on Circuits and Systems II: Express Briefs 57 (11), 888-892, 2010 | 17 | 2010 |
| Sentry tag: an efficient filter scheme for low power cache YJ Chang, SJ Ruan, F Lai Conferences in Research and Practice in Information Technology Series 19 …, 2002 | 16 | 2002 |
| Accuracy-configurable radix-4 adder with a dynamic output modification scheme KL Tsai, YJ Chang, CH Wang, CT Chiang IEEE Transactions on Circuits and Systems I: Regular Papers 68 (8), 3328-3336, 2021 | 12 | 2021 |
| Two-layer hierarchical matching method for energy-efficient CAM design YJ Chang Electronics Letters 43 (2), 1, 2007 | 12 | 2007 |
