M. M. Wong
Title
Cited by
Cited by
Year
Construction of Optimum Composite Field Architecture for Compact High-Throughput AES S-Boxes
MM Wong, MLD Wong, AK Nandi, I Hijazin
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 1-5, 0
50
Compact FPGA implementation of PRESENT with Boolean S-Box
JJ Tay, MLD Wong, MM Wong, C Zhang, I Hijazin
2015 6th Asia Symposium on Quality Electronic Design (ASQED), 144-148, 2015
352015
A high throughput low power compact AES S-box implementation using composite field arithmetic and Algebraic Normal Form representation
MM Wong, MLD Wong
2nd Asia Symposium on Quality Electronic Design (ASQED), 318-323, 2010
292010
Composite field GF(((2^2^)2)^2) Advanced Encryption Standard (AES) S-box with algebraic normal form representation in the subfield inversion
MM Wong, MLD Wong, AK Nandi, I.Hijazin
IET Circuits, Devices & Systems 5 (6), 471-476, 2011
282011
A new high throughput and area efficient SHA-3 implementation
MM Wong, J Haj-Yahya, S Sau, A Chattopadhyay
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
192018
Compact and low power aes block cipher using lightweight key expansion mechanism and optimal number of s-boxes
JJ Tay, MM Wong, I Hijazin
2014 International Symposium on Intelligent Signal Processing and …, 2014
172014
A new common subexpression elimination algorithm with application in composite field AES S-box
MM Wong, MLD Wong
Information Sciences Signal Processing and their Applications (ISSPA), 2010 …, 2010
162010
Lightweight secure-boot architecture for risc-v system-on-chip
J Haj-Yahya, MM Wong, V Pudi, S Bhasin, A Chattopadhyay
20th International Symposium on Quality Electronic Design (ISQED), 216-223, 2019
72019
New lightweight AES S-box using LFSR
MM Wong, MLD Wong
2014 International Symposium on Intelligent Signal Processing and …, 2014
72014
Composite field GF (((22) 2) 2) AES S-Box with direct computation in GF (24) inversion
MM Wong, MLD Wong, I Hijazin, AK Nandi
Information Technology in Asia (CITA 11), 2011 7th International Conference …, 2011
72011
Circuit and system design for optimal lightweight AES encryption on FPGA
MM Wong, MLD Wong, C Zhang, I Hijazin
IAENG International Journal of Computer Science 45 (1), 52-62, 2018
62018
Survey of secure processors
S Sau, J Haj-Yahya, MM Wong, KY Lam, A Chattopadhyay
2017 International Conference on Embedded Computer Systems: Architectures …, 2017
62017
Smarts: Secure memory assurance of risc-v trusted soc
MM Wong, J Haj-Yahya, A Chattopadhyay
Proceedings of the 7th International Workshop on Hardware and Architectural …, 2018
52018
Lightweight and high performance SHA-256 using architectural folding and 4-2 adder compressor
MM Wong, V Pudi, A Chattopadhyay
2018 IFIP/IEEE International Conference on Very Large Scale Integration …, 2018
42018
A tree search algorithm for low multiplicative complexity logic design
JJ Tay, MLD Wong, MM Wong, C Zhang, I Hijazin
Future Generation Computer Systems 83, 132-143, 2018
42018
Low multiplicative complexity logic minimisation over the basis (AND, XOR, NOT)
JJ Tay, MLD Wong, MM Wong, C Zhang, I Hijazin
Electronics Letters 52 (17), 1438-1440, 2016
42016
Compact and short critical path finite field inverter for cryptographic S-box
MM Wong, MLD Wong, C Zhang, I Hijazin
2015 IEEE International Conference on Digital Signal Processing (DSP), 775-779, 2015
42015
A new lightweight and high performance AES S-box using modular design
WM Ming, DWM Ling
2013 IEEE International Conference on Circuits and Systems (ICCAS), 65-70, 2013
32013
VLSI Implementation and Its Optimisation for Digital Cryptosystems
WM Ming
32012
Construction of a Low Multiplicative Complexity GF (24) Inversion Circuit for Compact AES S-Box
JJ Tay, MLD Wong, MM Wong, C Zhang, I Hijazin
TENCON 2018-2018 IEEE Region 10 Conference, 0540-0544, 2018
22018
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