| Synthesis of data path architecture with online fault detection mechanism for reconfigurable systems C Pradeep, R Radhakrishnan, R Saranya, S Philip Australian Journal of Basic & Applied Sciences 8 (10), 239-245, 2014 | 4 | 2014 |
| FPGA synthesis of reconfigurable modules for FIR filter R Saranya, C Pradeep, N Baby, R Radhakrishnan International Journal of Reconfigurable and Embedded Systems 4 (2), 2015 | 3 | 2015 |
| Design and implementation of a reconfigurable finite impulse response filter for adaptive systems R Saranya, C Pradeep, R Radhakrishnan International Journal of Computational Systems Engineering 3 (1-2), 82-90, 2017 | 2 | 2017 |
| Synthesis of reconfigurable video compression modules in Virtex FPGAs for multiple fault repair mechanism N Baby, C Pradeep, R Saranya, R Radhakrishnan Procedia Computer Science 46, 1333-1340, 2015 | 1 | 2015 |
| FPGA synthesis of area efficient data path for reconfigurable FIR filter R Saranya, C Pradeep 2014 International Conference on Control, Instrumentation, Communication and …, 2014 | 1 | 2014 |
| Historical Document Analysis Using Deep Learning S Devi, M Rajalakshmi, R Saranya, G Swathi, K Selvi Recent Trends in Computational Intelligence and Its Application, 123-128, 2023 | | 2023 |
