Reduced scan shift: A new testing method for sequential circuits Y Higami, S Kajihara, K Kinoshita Proceedings., International Test Conference, 624-630, 1995 | 50 | 1995 |
Diagnostic test generation for transition faults using a stuck-at ATPG tool Y Higami, Y Kurose, S Ohno, H Yamaoka, H Takahashi, Y Shimizu, ... 2009 International Test Conference, 1-9, 2009 | 36 | 2009 |
Image denoising with Gaussian mixture model Y Cao, Y Luo, S Yang 2008 Congress on Image and Signal Processing 3, 339-343, 2008 | 32* | 2008 |
Compaction of pass/fail-based diagnostic test vectors for combinational and sequential circuits Y Higami, KK Saluja, H Takahashi, S Kobayashi, Y Takamatsu Proceedings of the 2006 Asia and South Pacific Design Automation Conference …, 2006 | 27 | 2006 |
Structure-based methods for selecting fault-detection-strengthened FF under multi-cycle test with sequential observation S Wang, HT Al-Awadhi, S Hamada, Y Higami, H Takahashi, H Iwata, ... 2016 IEEE 25th Asian Test Symposium (ATS), 209-214, 2016 | 24 | 2016 |
Clues for modeling and diagnosing open faults with considering adjacent lines H Takahashi, Y Higami, S Kadoyama, T Aikyo, Y Takamatsu, K Yamazaki, ... 16th Asian Test Symposium (ATS 2007), 39-44, 2007 | 24 | 2007 |
Fault simulation and test generation for clock delay faults Y Higami, H Takahashi, S Kobayashi, KK Saluja 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 799-805, 2011 | 17 | 2011 |
Simulation-based diagnosis for crosstalk faults in sequential circuits H Takahashi, M Phadoongsidhi, Y Higami, KK Saluja, Y Takamatsu Proceedings 10th Asian Test Symposium, 63-68, 2001 | 17 | 2001 |
Simulation-based diagnosis for crosstalk faults in sequential circuits H Takahashi, M Phadoongsidhi, Y Higami, KK Saluja, Y Takamatsu Proceedings 10th Asian Test Symposium, 63-68, 2001 | 17 | 2001 |
Timing-aware diagnosis for small delay defects T Aikyo, H Takahashi, Y Higami, J Ootsu, K Ono, Y Takamatsu 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI …, 2007 | 16 | 2007 |
On the fault diagnosis in the presence of unknown fault models using pass/fail information Y Takamatsu, T Seiyama, H Takahashi, Y Higami, K Yamazaki 2005 IEEE International Symposium on Circuits and Systems, 2987-2990, 2005 | 16 | 2005 |
A novel approach for improving the quality of open fault diagnosis K Yamazaki, T Tsutsumi, H Takahashi, Y Higami, T Aikyo, Y Takamatsu, ... 2009 22nd International Conference on VLSI Design, 85-90, 2009 | 15 | 2009 |
Fault models and test generation for IDDQ testing: Embedded tutorial Y Higami, Y Takamatsu, KK Saluja, K Kinoshita Proceedings of the 2000 Asia and South Pacific Design Automation Conference …, 2000 | 15 | 2000 |
Sequential circuit test generation for IDDQ testing of bridging faults Y Higamit, T Maeda, K Kinoshita Digest of Papers IEEE International Workshop on IDDQ Testing, 12-16, 1997 | 15 | 1997 |
Testing of interconnect defects in memory based reconfigurable logic device (MRLD) S Wang, Y Higami, H Takahashi, M Sato, M Katsu, S Sekiguchi 2017 IEEE 26th Asian Test Symposium (ATS), 17-22, 2017 | 14 | 2017 |
Fault effect of open faults considering adjacent signal lines in a 90 nm IC H Yotsuyanagi, M Hashizume, T Tsutsumi, K Yamazaki, T Aikyo, Y Higami, ... 2009 22nd International Conference on VLSI Design, 91-96, 2009 | 13 | 2009 |
Residual energy-based OLSR in mobile ad hoc networks K Hirata, Y Higami, S Kobayashi 2011 International Conference on Multimedia Technology, 3214-3217, 2011 | 12 | 2011 |
Automotive functional safety assurance by POST with sequential observation S Wang, Y Higami, H Takahashi, H Iwata, J Matsushima IEEE Design & Test 35 (3), 39-45, 2018 | 11 | 2018 |
Increasing defect coverage by generating test vectors for stuck-open faults Y Higami, KK Saluja, H Takahashi, S Kobayashi, Y Takamatsu 2008 17th Asian Test Symposium, 97-102, 2008 | 11 | 2008 |
Partial scan design and test sequence generation based on reduced scan shift method Y Higami, S Kajihara, K Kinoshita Journal of Electronic Testing 7, 115-124, 1995 | 11 | 1995 |