A novel 800V multiple RESURF LDMOS utilizing linear P-top rings HS Wasisto, G Sheu, SM Yang, RO Sihombing, Y Guo, SH Tu, CH Lee, ... TENCON 2010-2010 IEEE Region 10 Conference, 75-79, 2010 | 18 | 2010 |
Method of fabricating a vertical diffusion metal-oxide-semiconductor transistor LEE Tsung-Hsiung, SH Tu, RO Sihombing US Patent 9,076,887, 2015 | 15 | 2015 |
Semiconductor device and method for fabricating the same PT Sulistyanto, RO Sihombing, C Lee, SH Tu US Patent 9,076,862, 2015 | 10 | 2015 |
An 800 volts high voltage interconnection level shifter using floating poly field plate (FPFP) method RO Sihombing, G Sheu, SM Yang, HS Wasisto, YF Guo, SH Tu, YL Chin, ... TENCON 2010-2010 IEEE Region 10 Conference, 71-74, 2010 | 8 | 2010 |
Semiconductor device and method for fabricating the same RO Sihombing, C Lee, LEE Tsung-Hsiung, SH Tu US Patent 8,642,427, 2014 | 5 | 2014 |
High voltage PNP using isolation for ESD and method for producing the same YFM Solaro, RO Sihombing, T Tsai, CE Gill US Patent App. 15/685,798, 2018 | 2 | 2018 |
Superjunction transistor with implantation barrier at the bottom of a trench LEE Tsung-Hsiung, SH Tu, S Gene, N Agarwal, K Nidhi, C Lee, ... US Patent 9,048,115, 2015 | 2 | 2015 |
Semiconductor device and method for fabricating the same R Kumar, M Kumar, S Gene, SM Yang, RO Sihombing, C Lee, SH Tu US Patent 9,466,730, 2016 | | 2016 |
Semiconductor device and method for fabricating the same M Kumar, PT Sulistyanto, C Lee, RO Sihombing, SH Tu US Patent 9,130,033, 2015 | | 2015 |
Semiconductor device layout structure RO Sihombing, SH Tu US Patent 9,070,763, 2015 | | 2015 |