Novi Prihatiningrum
Novi Prihatiningrum
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An architecture design of SAD based template matching for fast queue counter in FPGA
T Adiono, MD Adhinata, N Prihatiningrum, R Disastra, RVW Putra, ...
Intelligent Signal Processing and Communication Systems (ISPACS), 2016 …, 2016
Sibling relationship and block allocation table in file system for smart card operating system
N Prihatiningrum, MD Adhinata, R Disastra, A Sasongko
Electronics and Smart Devices (ISESD), International Symposium on, 109-114, 2016
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Articles 1–2