| Design and optimization approaches in double gate device architecture KE Kaharudin, AH Hamidon, F Salehuddin International Journal of Engineering and Technology (IJET) 6 (5), 2070-2079, 2014 | 18 | 2014 |
| TAGUCHI MODELING WITH THE INTERACTION TEST FOR HIGHER DRIVE CURRENT IN WSI^ sub X^/TIO^ sub 2^ CHANNEL VERTICAL DOUBLE GATE NMOS DEVICE KE Kaharudin, F Salehuddin, ASM Zain, M Aziz Journal of Theoretical and Applied Information Technology 90 (1), 185, 2016 | 15 | 2016 |
| Comparison of electrical characteristics between Bulk MOSFET and Silicon-on-insulator (SOI) MOSFET MNIA Aziz, F Salehuddin, ASM Zain, KE Kaharudin, SA Radzi Journal of Telecommunication, Electronic and Computer Engineering (JTEC) 6 …, 2014 | 14 | 2014 |
| Impact of height of silicon pillar on vertical DG-MOSFET device KE Kaharudin, AH Hamidon, F Salehuddin International Journal of Computer, Information, Systems and Control …, 2014 | 13 | 2014 |
| Optimization of process parameter variations on leakage current in in silicon-on-insulator vertical double gate mosfet device KE Kaharudin, F Salehuddin, ASM Zain, MNIA Aziz Journal of Mechanical Engineering and Sciences (JMES) 9 (December), 1614-1627, 2015 | 12 | 2015 |
| Analysis of process parameter effect on DIBL in n-channel MOSFET device using L27 orthogonal array F Salehuddin, KE Kaharudin, ASM Zain, AKM Yamin, I Ahmad AIP Conference Proceedings 1621 (1), 322-328, 2014 | 12 | 2014 |
| Effect of Channel Length Variation on Analog and RF Performance of Junctionless Double Gate Vertical MOSFET KE Kaharudin, F Salehuddin, ASM Zain, AF Roslan Journal of Engineering Science and Technology 14 (4), 2410 - 2430, 2019 | 11 | 2019 |
| Implementation of Taguchi modeling for higher drive current (ION) in vertical DG-MOSFET device KE Kaharudin, AH Hamidon, F Salehuddin Journal of Telecommunication, Electronic and Computer Engineering (JTEC) 6 …, 2014 | 11 | 2014 |
| Multi-response optimization in vertical double gate PMOS device using Taguchi method and grey relational analysis KE Kaharudin, F Salehuddin, ASM Zain, M Aziz, Z Manap, NA Abd Salam, ... 2016 IEEE International Conference on Semiconductor Electronics (ICSE), 64-68, 2016 | 10 | 2016 |
| Geometric and process design of ultra-thin junctionless double gate vertical MOSFETs. KE Kaharudin, F Salehuddin, ASM Zain, AF Roslan International Journal of Electrical & Computer Engineering (2088-8708) 9 (4), 2019 | 9 | 2019 |
| Optimization of electrical properties in TiO2/WSix-based vertical DG-MOSFET using Taguchi-based GRA with ANN KE Kaharudin, F Salehuddin, ASM Zain Journal of Telecommunication, Electronic and Computer Engineering (JTEC) 10 …, 2018 | 9 | 2018 |
| Enhanced performance of 19 single gate MOSFET with high permittivity dielectric material AF Roslan, F Salehuddin, ASM Zain, KE Kaharudin, I Ahmad Indonesian Journal of Electrical Engineering and Computer Science 18 (2 …, 2020 | 8 | 2020 |
| 30nm DG-FinFET 3D Construction Impact Towards Short Channel Effects AF Roslan, F Salehuddin, ASM Zain, KE Kaharudin, H Hazura, AR Hanim, ... Indonesian Journal of Electrical Engineering and Computer Science 12 (3 …, 2018 | 7 | 2018 |
| Application of Taguchi-based grey fuzzy logic for simultaneous optimization in TiO2/WSix-based vertical double-gate MOSFET KE Kaharudin, F Salehuddin, ASM Zain, M Aziz Journal of Telecommunication, Electronic and Computer Engineering (JTEC) 9 …, 2017 | 7 | 2017 |
| Comparison of 2k-Factorial and Taguchi Method for Optimization Approach in 32nm NMOS Device F Salehuddin, KE Kaharudin, HA Elgomati, I Ahmad, PR Apte, ZM Nopiah, ... Mathematical Methods and Optimization Techniques in Engineering, 125-134, 2013 | 7 | 2013 |
| Analysis of analog and RF behaviors in junctionless double gate vertical MOSFET KE Kaharudin, ZAFM Napiah, F Salehuddin, ASM Zain, AF Roslan Bulletin of Electrical Engineering and Informatics 9 (2), 2020 | 6 | 2020 |
| Optimization of 10nm Bi-GFET Device for higher ION/IOFF ratio using Taguchi Method AF Roslan, KE Kaharudin, F Salehuddin, ASM Zain, I Ahmad, ZAN Faizah, ... Journal of Physics: Conference Series 1123 (1), 012046, 2018 | 6 | 2018 |
| Impact of different dose, energy and tilt angle in source/drain implantation for vertical double gate PMOS device KE Kaharudin, F Salehuddin, ASM Zain, MNI Abd Aziz Journal of Telecommunication, Electronic and Computer Engineering (JTEC) 8 …, 2016 | 6 | 2016 |
| Characterization & optimization of 32nm P-channel MOSFET device N Mohammad, F Salehuddin, HA Elgomati, I Ahmad, NA Abd Rahman, ... Journal of Telecommunication, Electronic and Computer Engineering (JTEC) 5 …, 2013 | 6 | 2013 |
| Performance analysis of ultrathin junctionless double gate vertical MOSFETs KE Kaharudin, Z Napiah, F Salehuddin, ASM Zain, AF Roslan Bulletin of Electrical Engineering and Informatics 8 (4), 1268-1278, 2019 | 5 | 2019 |
Fauziyah Salehuddin, F.Salehuddin, S...Universiti Teknikal Malaysia Melaka (UTeM)Email yang diverifikasi di utem.edu.my
