| Design and VLSI implementation of pipelined multiply accumulate unit S Shanthala, C Raj, SY Kulkarni 2009 Second International Conference on Emerging Trends in Engineering …, 2009 | 51 | 2009 |
| Data interface circuit D Mazumdar, CP Raj US Patent 8,451,147, 2013 | 42 | 2013 |
| Design and implementation of parallel and pipelined distributive arithmetic based discrete wavelet transform IP core M Nagabushanam, S Ramachandran European Journal of Scientific Research 35 (3), 378-392, 2009 | 41* | 2009 |
| Vlsi design and analysis of multipliers for low power PV Rao, CP Raj 2009 Fifth International Conference on Intelligent Information Hiding and …, 2009 | 34 | 2009 |
| Performance enhancement of FINFET and CNTFET at different node technologies R Hajare, C Lakshminarayana, GH Raghunandan, CP Raj Microsystem Technologies 22, 1121-1126, 2016 | 29 | 2016 |
| Design and analog VLSI implementation of neural network architecture for signal processing SL Pinjare European Journal of Scientific Research 27 (2), 199-216, 2009 | 27 | 2009 |
| EEG feature extraction and classification using feed forward backpropogation algorithm for emotion detection SG Mangalagowri, PCP Raj 2016 International Conference on Electrical, Electronics, Communication …, 2016 | 20 | 2016 |
| Design and FPGA implementation of modified Distributive Arithmetic based DWT-IDWT processor for image compression M Nagabushanam, PCP Raj, S Ramachandran 2011 International Conference on Communications and Signal Processing, 1-4, 2011 | 18 | 2011 |
| Implementation of systolic array architecture for full search block matching algorithm on FPGA G Hegde, PR Vaya, P Cyril Prasanna Raj European Journal of Scientific Research ISSN, 606-616, 2009 | 18 | 2009 |
| Design and VLSI Implementation of interpolators/decimators for DUC/DDC YN Santhosh, N Palacha, CP Raj 2010 3rd International Conference on Emerging Trends in Engineering and …, 2010 | 17 | 2010 |
| Performance comparison of CMOS and FINFET based SRAM for 22nm Technology A Lourts Deepak, L Dhulipalla International Journal of Conceptions on Electronics and Communication …, 2013 | 15 | 2013 |
| Performance comparison of CMOS and FINFET based SRAM for 22nm Technology A Lourts Deepak, L Dhulipalla International Journal of Conceptions on Electronics and Communication …, 2013 | 15 | 2013 |
| Design and ASIC implementation of root raised cosine filter PV Rao, CR Prasanna, S Ravi European Journal of Scientific Research 31 (3), 319-328, 2009 | 13 | 2009 |
| Feature-level multi-focus image fusion using neural network and image enhancement SG Mamatha, SA Rahim, CP Raj Glob. J. Comput. Sci. Technol, 2012 | 10 | 2012 |
| Design and performance analysis of DWT/FFT based OFDM systems SS Manure, UL Naik 3rd International Conference on Advances in Recent Technologies in …, 2011 | 10 | 2011 |
| High speed area optimized hybrid da architecture for 2d-dtcwt SS Divakara, S Patilkulkarni, CP Raj International Journal of Image and Graphics 18 (01), 1850004, 2018 | 9 | 2018 |
| Design and Performance analysis of a 3GPP LTE/LTE-Advance turbo decoder using software reference models HG Lohith Kumar, KN Manjunatha, MS Suma, R CK, P Cyril Prasanna Raj International Journal of Scientific & Engineering Research 2 (7), 2011 | 9 | 2011 |
| Analysis of wavelet for 3D-DWT volumetric image compression BM Sunil, CP Raj 2010 3rd International Conference on Emerging Trends in Engineering and …, 2010 | 9 | 2010 |
| Neural network classifier for fighter aircraft model recognition K Roopa, TV Rama Murthy, PC Prasanna Raj Journal of Intelligent Systems 27 (3), 447-463, 2018 | 8 | 2018 |
| High speed modular systolic array-based DTCWT with parallel processing architecture for 2D image transformation on FPGA SS Divakara, S Patilkulkarni, CP Raj International Journal of Wavelets, Multiresolution and Information …, 2017 | 7 | 2017 |
Dr Sampatrao L PinjareSi2 Microsystems Pvt. LtdEmail yang diverifikasi di si2microsystems.com
